Items where Author is "<span class="person_name">Trainis, S.A.</span>"
Number of items: 4.
Article
  • iHARP a Multiple Instruction Issue Processor Chip Incorporating RISC and VLIW Design Features. (1992) S.A. Trainis, P. Findlay, G.B. Steven, R.G. Adams and D. McHale
  • iHarp: a Multiple Instruction Issue Processor. (1992) G.B. Steven, R.G. Adams, P. Findlay and S.A. Trainis
    • Other
  • HARP: a VLIW RISC processor. (1991) P. Findlay, S.A. Trainis, G.B. Steven and R.G. Adams
  • The development of iHARP: a multiple instruction issue processor chip. (1991) G.B. Steven, R.G. Adams, P. Findlay and S.A. Trainis