Modeling the function cache for worst-case execution time analysis

Kirner, Raimund and Schoeberl, Martin (2007) Modeling the function cache for worst-case execution time analysis. In: 2007 44TH ACM/IEEE Design Automation Conference :. Institute of Electrical and Electronics Engineers (IEEE), San Diego, pp. 471-476. ISBN 978-1-59593-627-1
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Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function caches, a special kind of instruction cache that caches whole functions only. This cache was designed with the aim to be more predictable for the worst-case than existing instruction caches. Within this paper we developed a cache analysis technique for the function cache. One of the new concepts of this analysis technique is the local persistence analysis, which allows to precisely model the function cache.

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