Intelligent co-operative PIM architecture for image analysis and pattern recognition

Ahmed, Z., Sotudeh, R. and Hussain, D.M.A. (2010) Intelligent co-operative PIM architecture for image analysis and pattern recognition. In: Procs of the International MultiConference of Engineers and Computer Scientists 2010, IMECS 2010 :. IAENG, International Association of Engineers, pp. 2236-2240. ISBN 978-988170128-2

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Computer memory systems are increasingly a bottleneck limiting application performance. Processor-In-Memory (PIM) architectures, which capitalize on merging the processing unit with its memory unit on the same chip [1], promise to remove this limitation by providing a tremendous increase in available memory bandwidth and significant reduction in memory latency for a specific class of computing that deals with significant amount of data with relatively simple operations. Many image processing and pattern recognition applications fall into this category. In this paper, some key characteristics with design philosophy of an intelligent co-operative PIM architecture (CIM) are discussed, and examples of image analysis algorithm that can run on it are given.

Item Type	Book Section
Additional information	Original article can be found at : http://www.iaeng.org/ Copyright International Association of Engineers
Keywords	co-operative intelligent memory (cim), cpu major, cpu minor, observer, processor-in-memory (pim), shared memory, task optimizer
Date Deposited	15 May 2025 16:16
Last Modified	30 May 2025 23:08