A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost
Zhu, X., Sun, Y. and Moritz, J.
(2007)
A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost.
Institute of Electrical and Electronics Engineers (IEEE).
The design and implementation of a CMOS continuous-time follow-the-leader-feedback (FLF) filter is described. The filter is implemented using a fully-differential linear, low voltage and low power consumption operational transconductance amplifier (OTA) based on a source degeneration topology. PSpice simulations using a standard TSMC 0.18 mum CMOS process with 2 V power supply have shown that the cut-off frequency of the filter ranges from 55 MHz to 160 MHz and dynamic range is about 45 dB. The group delay is less than 5% over the whole tuning range; the power consumption is only 9 mW.
Item Type | Other |
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Date Deposited | 14 Nov 2024 10:56 |
Last Modified | 14 Nov 2024 10:56 |
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